22-Bit Q-Bus Conversions
Overview
Many of the available Q-bus backplanes are 18-bit models, which limit the amount of Q-bus address space to 256 KB. This is fine for many systems with modest memory requirements. Larger systems, however, will need more address space, and an old 18-bit backplane can be easily converted to accommodate 22-bit modules.
The DEC connecting blocks soldered to many of the backplane circuit boards have wire wrap posts for solder pins. This provides the ability to add custom wiring to bring additional signals to the backplane, or to borrow signals for other uses.
The Q-bus pins that accept the missing address lines from the bus (DAL18 through DAL21) are BC1, BD1, BE1 and BF1, respectively. These pins were previously reserved for future use and not bussed together. By wire wrapping all of the BC1 pins together, BD1 pins together, BE1 pins together and BF1 pins together on the backplane, 22-bit boards will be able to utilize all of their address lines.
The following is a list of backplanes and the pins that need to be bussed together for each address line.
| Addr Line | H9270/DDV11-A | H9273-A | DDV11-B | H9281 |
|---|---|---|---|---|
| BDAL18 | BC1 & DC1 | BC1 | BC1 & DC1 | BC1 |
| BDAL19 | BD1 & DD1 | BD1 | BD1 & DD1 | BD1 |
| BDAL20 | BE1 & DE1 | BE1 | BE1 & DE1 | BE1 |
| BDAL21 | BF1 & DF1 | BF1 | BF1 & DF1 | BF1 |
Note that the H9273 has no wire wrap pins, so the jumpers for this backplane would have to be soldered in place.
The following photo is an example of an H9270 18-bit backplane that was converted to an H9270-Q 22-bit backplane. Because this backplane has a Q-bus/Q-bus configuration, the address lines appear on the B and D connecting blocks.
Notice how the pins are wrapped in same serpentine pattern as the rest of the bus lines. This ensures the lines are roughly the same length as the other address and data lines, and ensures they can be terminated in the same manner. The wiring was done from the last slot to the first, allowing the first slot to be easily disconnected, when a KD11 processor is being used. Special thanks to Noel Chiappa for pointing out the poor example of the 22-bit conversion I had posted here previously.
The extra wires between AF1, CH1 and the post next to the "D" on the circuit board carry the SRUN signal. The M7264 processor presents SRUN on its CH1 pin, whereas all other processor modules present the signal on AF1 and AH1. This wiring arrangement accomodates both scenarios. The signal is brought from the processor slot to a post above the D blocks. This post is connected to the 10-pin header and lights the run LED on the control panel.
References
- LSI-11 Systems Service Manual, 5th Edition, January 1985 (EK-LSIFS-SV-005)
- PDP-11 Microcomputer Interfaces Handbook, 1983-84 (EB-23144-18)
- Microcomputer Products Handbook, 1985 (EB-26078-41)
Additional Resources
- MicroNote 5 - Q22 Compatible Options
